Method of fabricating Group III-V compound semiconductor devices using selective etching

ABSTRACT

A solution of hydrogen peroxide  H 2  O 2  !, citric acid  HOC(CH 2  COOH) 2  COOH.H 2  O!, and a salt of citric acid such as potassium citrate  HOC(CH 2  COOK) 2  COOK.H 2  O!, and hydrogen peroxide  H 2  O 2  !, in a proper pH range, selectively etches GaAs-containing Group III-V compounds in the presence of other Group III-V compounds. As an illustration, Al y  Ga 1-y  As is selectively etched in the presence of Al x  Ga 1-x  As (0≦y&lt;0.2 &amp; x&gt;0.2) when the pH range of the etchant solution is between approximately 3 and 6. The etchant solution described herein may be utilized in the fabrication of, for example, high-frequency transistors exhibiting improved saturated current (I dss ) and threshold voltage (V th ) uniformity.

This invention relates generally to the fabrication of Group III-Vcompound semiconductor devices and, more particularly, to selectiveetching techniques used in such fabrication.

BACKGROUND OF THE INVENTION

Selective etching has been considered for use as a technique in themanufacture of various semiconductor devices such as field-effecttransistors (FET's). This technique involves incorporating an "etchstop" layer into the device in order to prevent unintended etching ofunderlying structures. Such unintended etching leads to variations inthe thickness in the active layers of FET's, which in turn results inundesired conductance variations of FET active channel regions. As anexample, variation in the uniformity of the etched active layersassociated with the MESFET devices on a single wafer has limitedproduction of MESFET-based integrated circuits formed on layeredsemiconductor structures grown using molecular beam epitaxy (MBE)processing techniques.

A number of methods have been developed for improving the uniformity ofdevices realized upon MBE-grown semiconductor structures. Included amongthese methods are selective "dry" (e.g., plasma) etching, selective"wet" etching using chemical solutions, as well as nonselective spraygate recess etching. Selective etch stop systems have so far proven themost effective in enhancing device uniformity. One figure of merit usedto characterize selective etching techniques is known as "etchselectivity", which is defined as the ratio of the etch rate of thesemiconductor layer overlying the etch stop layer to the etch rate ofthe etch stop layer. Although dry etchants enable high etch selectivity,dry etchants tend to increase the risk of damage to semiconductordevices relative to wet etchants. On the other hand, the lower etchselectivity of wet etchants has often required the utilization ofrelatively thick etch stop layers to prevent inadvertent etching ofunderlying portions of the device. Unfortunately, such thick etch stoplayers often degrade device performance relative to otherwise identicaldevices fabricated in the absence of an etch stop layer. For example,the performance of GaAs-based MESFET devices realized using AlGaAs etchstop layers of the requisite thickness has tended to degrade due to theresultant increased source access resistance.

OBJECTS OF THE INVENTION

Accordingly, it is an object of the present invention to provide amethod for fabricating semiconductor devices which employs an etchingtechnique having a high etch selectivity and a low potential forinducing device damage.

It is a further object of the present invention to provide an etchingtechnique capable of increasing the uniformity of semiconductor deviceoperating characteristics, such as FET saturated current (I_(dss)),without compromising device performance.

SUMMARY OF THE INVENTION

In summary, it has been discovered that a buffered aqueous solutioncomprising citric acid HOC(CH₂ COOH)₂ COOH•H₂ O!, a salt of citric acidsuch as potassium citrate HOC(CH₂ COOK)₂ COOK•H₂ O!, and hydrogenperoxide H₂ O₂ !, in a proper pH range, selectively etchesGaAs-containing Group III-V compounds in the presence of other GroupIII-V compounds. As an illustration, Al_(y) Ga_(1-y) As is selectivelyetched in the presence of Al_(x) Ga_(1-x) As (0≦y<0.2 & x>0.2) when thepH range of the etchant solution is between approximately 3 and 6.

It has further been discovered that an Al_(x) Ga_(1-x) As etch stoplayer of a thickness less than a critical value determined by x does notdegrade the source access resistance of GaAs-based MESFET devices. Thecritical layer thicknesses corresponding to x=0.35, 0.50, and 1.00 areapproximately 40 angstroms, 25 angstroms, and 10 angstroms,respectively.

The etchant solution described herein may be utilized to improve theuniformity of devices in the fabrication of, for example, high-frequencytransistors. Such devices exhibit improved saturated current (I_(dss))and threshold voltage (V_(th)) uniformity.

BRIEF DESCRIPTION OF THE DRAWINGS

Additional objects and features of the invention will be more readilyapparent from the following detailed description and appended claimswhen taken in conjunction with the drawings, in which:

FIG. 1 shows a cross-sectional view (not to scale) of a semiconductorwafer which may be further processed to yield GaAs-based field-effecttransistors.

FIG. 2 is a cross-sectional view of a field-effect transistor (FET)structure formed by selectively etching the wafer of FIG. 1 inaccordance with the invention.

FIG. 3 illustrates the rate (Å/sec) at which GaAs is etched by anetchant solution formulated in accordance with the present invention,and specifically shows etch rate as a function of the ratio of thevolume of a citrate buffer composed of citric acid and potassiumcitrate, to the volume of H₂ O₂ in the etchant solution.

FIG. 4 shows the etch selectivity of GaAs relative to Al_(x) Ga_(1-x) Asas a function of aluminum content (x), where etching was performed usingan etchant solution of the present invention.

FIG. 5 is a three-dimensional graphical representation of the etch rateof GaAs as a function of selected values of citrate bufferconcentration, and as a function of the volumetric ratio of citratebuffer to H₂ O₂.

FIG. 6 depicts a cross-sectional view of a semiconductor structureundergoing etching in accordance with the present invention.

FIG. 7 is a graphical representation of the current flowing between apair of ohmic contacts deposited on the surface of the structure of FIG.6 as a function of etch time.

FIG. 8 shows a distribution of saturated drain to source current(I_(dss)) for a set of GaAs field-effect transistors realized on a waferusing a conventional wet etchant.

FIG. 9 shows the I_(dss) current distribution for the transistors on awafer etched in accordance with the buffered etch solution of theinvention.

DESCRIPTION OF THE PREFERRED EMBODIMENT

Although the compound semiconductor material referred to herein iscomposed of gallium arsenide (GaAs) and aluminum gallium arsenide(AlGaAs), the etchant of the present invention may be suitable forapplication to structures comprised of other semiconductor compounds. Inwhat follows the concentration (i.e. mole fraction) of aluminum inAl_(x) Ga_(1-x) As will be identified as x, where x can range from 0to 1. The examples below describe in detail the use of a bufferedaqueous solution comprising citric acid HOC(CH₂ COOH)₂ COOH.H₂ O!, asalt of citric acid such as potassium citrate HOC(CH₂ COOK)₂ COOK.H₂ O!,and hydrogen peroxide H₂ O₂ !, in a proper pH range, as a selective etchfor Al_(y) Ga_(1-y) As in the presence of Al_(x) Ga_(1-x) As (0≦y<0.2 &x>0.2). In addition, data are included illustrating that the etchselectivity ratio varies as a function of aluminum mole fraction. Unlessindicated otherwise, the various materials, dimensions, and the likespecified herein are illustrative only and are not to be construed aslimiting the scope of the invention.

FIG. 1 shows a cross-sectional view (not to scale) of a semiconductorwafer 10 which may be further processed to yield, for example,GaAs-based field-effect transistors. The wafer 10 includes a GaAssemi-insulating substrate 12 on which were grown an undoped GaAs bufferlayer 14 and a doped GaAs channel layer 16 using molecular beam epitaxy(MBE) techniques. A thin Al_(x) Ga_(1-x) As (0.25≦x≦1.0) etch stop layer20 and doped GaAs contact layer 24 were then also epitaxially grownthrough an MBE process upon the channel layer 16. Wafers were processedin which the thickness of the AlGaAs etch stop layer 20 ranged, inaccordance with increasing mole fraction x, from approximately 50 to 8angstroms (Å). The thicknesses of the channel layer 16 and contact layer24 were chosen to be approximately 650 Å and 1000 Å, respectively.

FIG. 2 provides a cross-sectional view of a GaAs MESFET processed inaccordance with the present invention. Subsequent to conventional deviceisolation and ohmic contact formation, the wafer 10 was patterned forgate definition in a conventional manner. The wafer 10 was thenselectively etched as an intermediate step in forming the field-effecttransistor (FET) structure 50 shown in cross-section in FIG. 2. Etchselectivity was controlled primarily by adjusting the pH of the etchingsolution, the concentration of H₂ O₂, and the sum of the concentrationsof citric acid and potassium citrate. A gate region 54 and passivationlayer 58 were then conventionally formed upon the portion of the etchstop layer 20 exposed during the etching process. The FET structure 50further includes ohmic contacts 62a and 62b deposited over drain andsource regions of the contact layer 24. Current flow between the drainand source contacts 62a and 62b is controlled by adjusting the voltageapplied to the gate region 54, thereby modulating the conductivity ofthe channel region 16.

FIG. 3 illustrates the etch rate (Å/sec) of GaAs as a function of theratio of the volume of citrate buffer, i.e., citric acid and potassiumcitrate, to the volume of 30% H₂ O₂ (hereinafter referred to simply asH₂ O₂) within an etchant solution formulated in accordance with thepresent invention. FIG. 3 relates to experimental etching conducted atcitrate buffer concentrations of 0.4 moles/liter(M), 0.45M, 0.5M, 0.6M,0.8M and 1.0M. As is indicated by FIG. 3, relatively higher etch ratesare observed for volumetric ratios of buffer to H₂ O₂ greater than four.The highest etch rates are observed at buffer concentrations of between0.45M and 0.6M.

.Iadd.The buffered etchant solution has a concentration in moles/literof hydrogen peroxide in said solution which is greater than theconcentration in moles/liter of citric acid in the solution and greaterthan the concentration in moles/liter of the salt of citric acid in thesolution. The concentration of hydrogen peroxide is in the range ofapproximately 1-2.5 moles/liter when the concentration of citric acid isin the range of approximately 0.2-0.7 moles/liter and the concentrationof the salt of citric acid is approximately in the range of 0.2-0.7moles/liter. .Iaddend.

FIG. 4 shows the etch selectivity of GaAs relative to Al_(x) Ga_(1-x) Asas a function of aluminum mole fraction (x), where etching was performedusing an etchant solution of the present invention. Etch selectivity,defined as the ratio of the GaAs etch rate to the Al_(x) Ga_(1-x) Asetch rate, is seen to increase exponentially with aluminum content forthe measured set of AlGaAs compounds, which includes compoundscontaining up to 45% aluminum. Etch rates for each material weredetermined using a citrate buffer concentration of 0.3M mixed in avolumetric ratio of 8:1 with H₂ O₂.

FIG. 5 provides a three-dimensional graphical representation of the etchrate of GaAs as a function of selected values of citrate bufferconcentration, and as a function of the volumetric ratio of citratebuffer to H₂ O₂. As shown in FIG. 5, etch rate increases monotonicallyas the buffer to H₂ O₂ ratio increases up to a ratio of about 5:1, witha significant increase in etch rate occurring between the ratios of 4.0and 4.5. Buffer concentration is shown to have a similar effect, inthat, for concentration values below 0.45 moles/liter GaAs etch rate isseen to significantly decrease.

FIG. 6 depicts a semiconductor structure 100 grown in a mannersubstantially identical to that described above with reference to thewafer 10 (FIG. 1). The semiconductor structure 100 includes ohmiccontacts 62a and 62b deposited upon the GaAs contact layer 24 usingconventional techniques. A recessed gate field effect transistor such asthe FET 50 (FIG. 2) may be formed from the structure 100 by etching theGaAs contact layer 24 through a mask between the contacts 62a and 62b toa depth determined by the position of the etch stop layer 20. The lowrate at which the stop layer 20 is etched relative to the layer 24advantageously allows etching to be performed without precise control ofetching time. That is, the barrier formed by the stop layer 20 preventsthe active channel region formed by the GaAs layer 16 from being etchedwhen the structure 100 is subjected to an etchant formulated inaccordance with the invention for a period longer than that required tocompletely etch the layer 24. This enables the current characteristicsof the device to be determined by the epitaxial structure andsubstantially independent of etching time. In contrast, conventionaletching in the absence of stop layer 24 requires that the currentflowing between the contacts 62a and 62b in response to a voltageapplied therebetween be monitored in order to determine when the activechannel region is of the desired thickness. This repeated monitoringreduces production efficiency by requiring multiple etch steps, ratherthan the single etching step contemplated by the invention, to achievethe desired channel thickness.

This advantage may be more fully appreciated with reference to FIG. 7,which is a graphical representation of the current flowing between thecontacts 62a and 62b as function of the time selective etching wasperformed in accordance with the invention. Experiments were performedusing four etch stop layers (L1, L2, L3, and L4), having thicknesses of25 Å, 14 Å, 25 Å, and 8 Å and aluminum mole fractions (x) of 0.35, 0.35,0.25 and 1.0, respectively. As is indicated by FIG. 7, the currentbetween the contacts 62a and 62b dropped significantly in all instancesduring the initial 50 seconds of etching as the thickness of the layer24 was reduced between the contacts 62a and 62b. The subsequentinsignificant change in etch current shows that each of the etch stoplayers L1-L4 are capable of preventing the underlying active channelregion 16 from being etched significantly for at least 1000 seconds.Accordingly, the present invention obviates the need to monitor thecurrent between the contacts 62a and 62b as a means of providing anactive channel of desired thickness.

FIG. 8 shows a distribution of saturated drain to source current(I_(dss)) for a set of field-effect transistors realized on a waferusing a conventional wet etchant consisting of water, phosphoric acid,and H₂ O₂. The height of each rectangular bar in FIG. 8 is thecumulative number of transistors on the wafer having a particularI_(dss) at an applied drain to source voltage, V_(ds), of 2.0 volts. Thenumber of transistors having I_(dss) within a predefined range of themedian I_(dss) is one factor bearing on wafer yield, i.e., thepercentage of transistors on the wafer having acceptable operatingcharacteristics. In this regard the median I_(dss) of the distributionof FIG. 8 is 37.6 mA, with the upper and lower quartiles of I_(dss)values being above 42.3 mA and below 32.9 mA, respectively. Oneparameter used to evaluate acceptable I_(dss) variation is thepercentage of median I_(dss) corresponding to the current spread betweenthe upper and lower quartiles. This percentage, hereinafter denoted as%ΔQ, is equivalent to 25% for the I_(dss) distribution of FIG. 8.

FIG. 9 shows the I_(dss) current distribution for the transistors on awafer etched in accordance with the invention. Specifically, etching waseffected using a buffered etch consisting of a solution 0.4M in citricacid and 0.4M in potassium citrate mixed in a volumetric ratio of 6:1with H₂ O₂. From FIG. 9 it can be seen that the variation in I_(dss)among the set of transistors realized using the inventive etchingtechnique is significantly less than the I_(dss) variation associatedwith the distribution of FIG. 8. The %ΔQ of 8% characterizing thedistribution of FIG. 9 is typical of the improved uniformity in I_(dss)made possible by the present invention.

While the present invention has been described with reference to a fewspecific embodiments, the description is illustrative of the inventionand is not to be construed as limiting the invention. Variousmodifications may occur to those skilled in the art without departingfrom the true spirit and scope of the invention as defined by theappended claims.

What is claimed is:
 1. A method of making a semiconductor devicecomprising the steps of:fabricating a structure having first and secondGroup III-V compound regions of differing composition, said firstcompound region including GaAs; subjecting said structure to an etchantcomprising a solution of a citrate buffer and H₂ O₂ with a pH in therange of approximately 3 to 6 so that said first region is selectivelyetched with respect to the second region, said citrate buffer includingcitric acid and a salt of citric acid, wherein the concentration . .byvolume.!. .Iadd.in moles/liter .Iaddend.of hydrogen peroxide in saidsolution is greater than the concentration . .by volume.!. .Iadd.inmoles/liter .Iaddend.of citric acid in said solution and greater thanthe concentration . .by volume.!. .Iadd.in moles/liter .Iaddend.of saidsalt of citric acid in said solution.
 2. The method of claim 1 furtherincluding the step of formulating said etchant such that saidconcentration of H₂ O₂ is in the range of approximately 1-2.5moles/liter when said concentration of citric acid is in the range ofapproximately 0.2-0.7 moles/liter.
 3. The method of claim 2 furtherincluding the step of formulating said etchant such that saidconcentration of H₂ O₂ is in the range of approximately 1-2.5moles/liter when said concentration of said salt of citric acid isapproximately in the range 0.2-0.7 moles/liter.
 4. The method of claim 1further including the step of formulating said etchant such that:saidconcentration of said salt of citric acid in said solution is in therange of 0.2-0.7 moles/liter, and one-half of the sum of saidconcentrations of said citric acid and said salt of citric acid isgreater than 0.3 moles/liter and less than 1.0 moles/liter.
 5. Themethod of claim 1 wherein said first compound region consists of Al_(y)Ga_(1-y) As and said second compound region consists of Al_(x) Ga_(1-x)As wherein (0≦y<0.2) and (0.2<x≦1.0).
 6. A method of making asemiconductor device comprising the steps of:fabricating a structureby(i) growing one or more layers of the type X_(a) Y_(1-a) As, where Xis an atom selected from the group of IIIA atoms and Y is a differentatom selected from the group of IIIA atoms, and where (0<a≦1) upon asemiconductor substrate, and (ii) growing first and second Group III-Vcompound regions of differing composition upon said one or more layers,said first compound region including GaAs; and subjecting said structureto an etchant comprising a solution of a citrate buffer and H₂ O₂ with apH in the range of approximately 3 to 6 so that said first region isselectively etched, said citrate buffer including citric acid and a saltof citric acid, wherein the concentration in .Iadd.moles/liter.Iaddend.of hydrogen peroxide in said solution is greater than theconcentration .Iadd.in moles/liter .Iaddend.of citric acid in saidsolution and greater than the concentration .Iadd.in moles/liter.Iaddend.of said salt of citric acid in said solution.
 7. The method ofclaim 6 wherein said second region comprises Al_(x) Ga_(1-x) As where(0.2<x≦1), said second region being grown upon said one or more layersto a thickness selected in accordance with the value of x.
 8. A methodof making a field-effect transistor comprising the steps of:fabricatinga structure by(i) growing one or more active channel layers comprised ofGroup III-V compounds upon a semiconductor substrate, (ii) growing athin etch stop region of Al_(x) Ga_(1-x) As upon said active channellayers where (0.2<x≦1), and (iii) growing a cap region including GaAsupon said thin etch stop region; and subjecting said structure to anetchant comprising a solution of a citrate buffer and H₂ O₂ with a pH inthe range of approximately 3 to 6 so that said cap region is selectivelyetched and said etch stop region prevents etching of said active channellayers, said citrate buffer including citric acid and a salt of citricacid, wherein the concentration .Iadd.in moles/liter .Iaddend.ofhydrogen peroxide in said solution is greater than the concentration.Iadd.in moles/liter .Iaddend.of citric acid in said solution andgreater than the concentration .Iadd.in moles/liter .Iaddend.of saidsalt of citric acid in said solution.
 9. The method of claim 1 whereinsaid salt of citric acid comprises potassium citrate.
 10. The method ofclaim 6 wherein said salt of citric acid comprises potassium citrate.11. A method of making a semiconductor transistor device comprising thesteps of:fabricating a structure having first and second active channellayers respectively comprised of first and second Group III-V compoundregions of differing composition, said first compound region includingGaAs and said second compound region being of a thickness of less than100 angstroms; subjecting said structure to an etchant comprising asolution of a citrate buffer and H₂ O₂ with a pH in the range ofapproximately 3 to 6 so that said first region is selectively etchedwith respect to the second region, said citrate buffer including citricacid and a salt of citric acid, wherein the concentration . .byvolume.!. .Iadd.in moles/liter .Iaddend.of hydrogen peroxide in saidsolution is greater than the concentration . .by volume.!. .Iadd.inmoles/liter .Iaddend.of citric acid in said solution and greater thanthe concentration . .by volume.!. .Iadd.in moles/liter .Iaddend.of saidsalt of citric acid in said solution.